WILSONVILLE, OR--(Marketwire - May 27, 2010) - Mentor Graphics Corporation (NASDAQ: MENT) today announced that the Calibre® nmLVS product now provides comprehensive support for the iLVS interoperable rule specification used by TSMC for new design kits. This allows customers to define and customiz.....
Language : english Authorization: Pre Release Freshtime：2009-05-28 Size: 612MB
entor Graphics Corporation (Nasdaq: MENT), the market leader in printed circuit board design (PCB) solutions, today announced the availability of the next generation of PADS® flow with the introduction of PADS2007. This newest release offers layout designers and engineers the ability to implement R.....
Language : english Authorization: Retail Freshtime：2009-05-24 Size: 587MB
SystemCrafter SC 3.0 is a SystemC synthesis tool for Xilinx FPGAs. Breakthrough price of $3000 brings SystemC synthesis within reach of everyone. Use SystemC, the industry-standard addition to C++ for describing hardware. Design, debug and simulate hardware and systems using the SystemCr.....
Language : english Authorization: Pre Release Freshtime：2009-05-23 Size: 8MB
Recent collaboration between UMC and Synopsys has resulted in a complete RTL-to-GDSII reference design flow, which now includes critical design for manufacturing features for UMC抯 90nm process. Suzanna Chang, Senior Director of Marketing for UMC, and Paul Lai, Group Manager of Strategic Alliances, .....
Language : english Authorization: Pre Release Freshtime：2009-05-16 Size: 376MB
::::::English Description::::::The Formality® Equivalence Checker uses formal techniques to prove or disprove equivalence between two versions of the same design. Equivalence checking is a type of static analysis that verifies large designs both quickly and completely without the use of test v.....
Language : english Authorization: Pre Release Freshtime：2009-05-10 Size: 59MB
Formality® is an equivalence-checking (EC) solution that uses formal, static techniques to determine if two versions of a design are functionally equivalent.
The size and complexity of today’s designs, coupled with the challenges of meeting timing, area, power and schedule, requires that the newe.....
Language : english Authorization: Retail Freshtime：2009-05-10 Size: 55MB
Synopsys’ Star-RCXT™ is the electronic design automation (EDA) industry’s gold standard for
parasitic extraction. It provides a single solution for ASIC, system-on-chip (SoC), digital custom,
memory and analog designs. Trusted by over 250 semiconductor companies and proven in thousands
of product.....
Language : english Authorization: Retail Freshtime：2009-05-10 Size: 138MB
Xtensa Xplorer is the only SOC design environment that integrates software development, processor optimization and multiple-processor system-on-chip (SOC) architecture tools into one common platform. You can access powerful design automation tools that ease the creation of Xtensa processor-based .....
Language : english Authorization: Retail Freshtime：2009-05-10 Size: 256MB
=============================================HFSS is now able to export surface and volume losses in .xml file format for linking to an ANSYS Mechanical v12 thermal analysis.DXF files can now be imported with .tech layer mapping files.ANSft00084239 - Users can now run a non-graphical batchsolve of a.....
Language : english Authorization: Pre Release Freshtime：2009-05-07 Size: 485MB
This morning Synopsys publicly announced the long-rumored--and demonstrated in the private rooms at DAC--Orion project: a custom and cell-based analog-mixed-signal (AMS) design environment aimed at breaking the dominance of Cadence's Virtuoso platform. By targeting what they see as changes in.....
Language : English Authorization: Pre Release Freshtime：2009-05-07 Size: 223MB
AUCOPLAN integrates data and documents from electrical and electro-mechanical engineering, automation technology, and process engineering planning.
AUCOPLAN is characterized by maximum flexibility and adaptability to special labeling instructions, engineering processes and documentation regulations......
Language : english Authorization: Pre Release Freshtime：2009-05-03 Size: 257MB
Sentaurus Process is an advanced 1D, 2D, and 3D process simulator for developing and optimizing silicon and compound semiconductor process technologies. Created by combining the best-in-class features from Synopsys and former ISE TCAD products, together with a wide range of new features and capabili.....
Language : english Authorization: Retail Freshtime：2009-05-03 Size: 345MB
Foundry giant Taiwan Semiconductor Manufacturing Co. said today that it was engaging intellectual property player Virage Logic Corp. to develop libraries in support of early users of TSMC's 65nm technology.The agreement provides chip designers with memory compilers for SoC designs, the foundry sa.....
Language : English Authorization: Pre Release Freshtime：2009-05-02 Size: 204MB
Maxwell 12.1 Release notes==========================New Features/Improvements in 12.1=================================3D Meshing----------A new mesh making algorithm has been added for Maxwell 3D. In the Maxwell 12.1 release this new mesh maker is only used for 3D transient models with rotational mo.....
Language : english Authorization: Pre Release Freshtime：2009-05-02 Size: 211MB
Ansoft Simplorer 8.0 is a multi-domain system simulation software program. It is used for the design, modeling, analysis and optimization of high-performance systems that include electrical, thermal, electromechanical, electromagnetic, and hydraulic designs. These complex systems are commonly fou.....
Language : english Authorization: Pre Release Freshtime：2009-05-01 Size: 240MB
Designers increasingly use advanced multi-clocking architectures to meet the high-performance and low-power requirements of their chips. The 0-In® CDC verification solution focuses on the interaction between these clock domains. In fact, it addresses a number of critical verification issues t.....
Language : English Authorization: Pre Release Freshtime：2009-05-01 Size: 662MB
Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that Cypress Semiconductor Corp. has successfully taped out its West Bridge™ Antioch™ peripheral controller multimedia 3G/3.5G mobile phone integrated circuit (IC) using the Synopsys Galaxy™ design pla.....
Language : english Authorization: Pre Release Freshtime：2009-05-01 Size: 92MB
FineSim Pro defines a new paradigm in full-chip circuit-level simulation, enabling the simulation of the most challenging analog/mixed-signal SoCs with SPICE accuracy and unprecedented performance.
Diagram
* Combination of accuracy and performance in a single executable allows large, mixed-sig.....
Language : english Authorization: Pre Release Freshtime：2009-04-28 Size: 71MB
With the Cadence® SoC Encounter™ RTL-to-GDSII System, engineers can account for the effects of interconnect across the entire chip—from the outset of the implementation cycle. It combines RTL synthesis, silicon virtual prototyping, automated floorplan synthesis, clock network synthesis, design fo.....
Language : english Authorization: Pre Release Freshtime：2009-04-26 Size: 1.88G
Technology Computer-Aided Design (TCAD) refers to the use of computer simulations to develop and optimize semiconductor processing technologies and devices. Synopsys TCAD software solves fundamental, physical partial differential equations, such as diffusion and transport equations, to model the .....
Language : English Authorization: Pre Release Freshtime：2009-04-26 Size: 473MB
ICX / TAU
ICX® and ICX Pro provide an intuitive user interface for engineers to explore signal integrity solutions in their high-speed designs. Engineers learning signal integrity are offered a concise view of how things work, while those more seasoned are able to investigate signal integrity effe.....
Language : english Authorization: Pre Release Freshtime：2009-04-25 Size: 286MB
Sisoft Quantum-Sl 2008.10 SP4 is the recognized leader for high-speed design among electrical and signal integrity engineers, with a proven track record for addressing tough high speed design problems. Quantum-SI's comprehensive analysis capabilities accurately predict system-level noise and tim.....
Language : English Authorization: Pre Release Freshtime：2009-04-24 Size: 186MB
During European Microwave Week in Amsterdam, Computer Simulation Technology (CST) announced the release of Version 2009 of the electromagnetic simulation software CST STUDIO SUITE, including its flagship product CST MICROWAVE STUDIO (MWS).Researchers and design engineers use CST STUDIO SUITE for .....
Language : English Authorization: Pre Release Freshtime：2009-04-20 Size: 3.71G