• Denali PureSuite 3.2.062 Linux64

    Denali PureSuite 3.2.062 Linux64 is the industry's most complete compliance suite for exercising designs and measuring compliance with the PCI Expresss specification, and ensuring interoperability with other PCI Express designs. Used with the PureSpec&trade verification IP product, PureSuite prov.....
    Language : English Authorization: Retail Freshtime:2009-09-13 Size: 5MB
  • CoWare Signal Processing Designer 2009.1

    CoWare Signal Processing Designer 2009.1Implementing Algorithms for Platform-Driven ESL Design Highlights Industry's fastest, production proven signal processing simulator Fully supported on Windows and Linux 4000+ models with source code Unique standards reference libraries Fully.....
    Language : English Authorization: Retail Freshtime:2009-09-13 Size: 251MB
  • CoWare Processor Designer 2009.1

    CoWare Processor Designer 2009.1Programmable Accelerators for Platform-Driven ESL Design Integrated design environment for unified application specific processor, programmable accelerator design and software development tool generation Slashes application specific processor and programmable.....
    Language : english Authorization: Pre Release Freshtime:2009-09-13 Size: 116MB
  • Coware ConvergenSC 2004.1 Linux

    CoWare, Inc. has announced a major new release of its SystemC-based ConvergenSC SoC design tools to speed adoption of electronic system level (ESL) design methodologies by system designers and architects. The release combines new features that enable faster modeling and debug of IP models, platform .....
    Language : english Authorization: Retail Freshtime:2009-09-13 Size: 608MB
  • Cadence IFV 8.1 Linux

    Cadence Incisive Formal Verifier(IFV) allows design teams to start RTL block verification months earlier than when using traditional simulation-based techniques. Its formal, assertion-based approach and exhaustive analysis capabilities ensure verification quality by pinpointing the source of bu.....
    Language : english Authorization: Pre Release Freshtime:2009-09-13 Size: 1.02G
  • NI LabVIEW 2009 v9.0 Adaptive Filter Toolkit

    # Algorithms including LMS, normalized LMS, leaky LMS, fast block LMS, sign LMS, RLS, and QR-RLS # Filtered-X LMS and normalized filtered-X LMS algorithm for active noise/vibration control # Examples including adaptive noise/echo cancellation, adaptive system identification, and LPC # Simulation and.....
    Language : english Authorization: Pre Release Freshtime:2009-09-13 Size: 38MB
  • Mentor Graphics DxDesigner Expedition Flow 2007.5 with UPDAte5

    Well-maintained and consistent libraries are the keys to efficient design work in Expedition PCB®. The "Library Manager™ for DxDesigner® to Expedition® PCB Flow" course will give you the skills necessary to create, protect, add to and change the different data types in your Central Library. The .....
    Language : english Authorization: Pre Release Freshtime:2009-09-12 Size: 969MB
  • Agilent RF Design Environment (RFDE) 2008 Update2 Linux

    Agilent RF Design Environment (RFDE) provides access to the ADS circuit simulators directly from the Cadence Analog Design Environment (ADE). Note: RFDE is being replaced by Agilent's GoldenGate RFIC Design Software. RFDE 2009 is the last supported release. Agilent's GoldenGate is the leading RFIC .....
    Language : english Authorization: Retail Freshtime:2009-09-09 Size: 572MB
  • IAR Embedded Workbench for dsPIC 1.40

    Integrated development environment and optimizing C/EC++ compiler for dsPIC/PIC24 IAR Embedded Workbench with its C and EC++ compiler provides full support, including DSP support, for all devices in dsPIC and PIC24 families and has tight integration with MPLAB from Microchip. Highlights in vers.....
    Language : english Authorization: Retail Freshtime:2009-09-05 Size: 28MB
  • Synopsys System Studio tool 2009.03 SP1 Linux

    Synopsys System Studio tool 2009.03 SP1 Linux Release!System Studio is a high performance, model-based algorithm design and analysis tool, combining unmatched simulation performance with high modeling efficiency plus the industry's best integration into the chip implementation design and verifica.....
    Language : English Authorization: Pre Release Freshtime:2009-09-05 Size: 469MB
  • Synopsys Saber 2009.06 SP1 Linux

    Saber Accelerates Robust Design Focus: Manage mechatronic complexity by accelerating Robust Design via simulation * Automotive (mid-class car) -- 50+ microprocessors, 100+ sensors, 30+ electrical subsystems * Aerospace (A380) -- 530km of wires, 100,000 cable sections, 40,300 connector.....
    Language : english Authorization: Retail Freshtime:2009-09-04 Size: 1.25G
  • Synopsys Saber 2009.06 SP1 Win

    Synopsys Saber 2009.06 SP1 Win Focus: Manage mechatronic complexity by accelerating Robust Design via simulation Automotive (mid-class car) -- 50+ microprocessors, 100+ sensors, 30+ electrical subsystems Aerospace (A380) -- 530km of wires, 100,000 cable sections, 40,300 connectors Results f.....
    Language : English Authorization: Pre Release Freshtime:2009-09-04 Size: 1.18G
  • Synopsys Tcad Taurus Tsuprem4 2009.06 Linux64

    Installing the Software The TCAD tools use the Synopsys Installer tool, which allows you to use a graphical user interface (GUI) or a text script. For information about downloading Synopsys Installer and the TCAD tools, see Installing Synopsys Tools, available at http://www.synopsys.com/install. To .....
    Language : english Authorization: Retail Freshtime:2009-09-04 Size: 53MB
  • Synopsys Tcad Taurus Medici 2009.06 Linux64

    Process and Device Simulation Tools Technology Computer-Aided Design (TCAD) refers to the use of computer simulations to develop and optimize semiconductor processing technologies and devices. Synopsys TCAD offers a comprehensive suite of products that includes industry leading process and device .....
    Language : english Authorization: Retail Freshtime:2009-09-04 Size: 89MB
  • NI LabVIEW 2009

    VI Snippets are a new way to store, share and reuse small portions of LabVIEW code. VI Snippets combine the portability of a screenshot with the functionality of a VI file by embedding LabVIEW code in a standard PNG image. When you drag a VI Snippet PNG image onto the block diagram it will drop the .....
    Language : english Authorization: Retail Freshtime:2009-09-03 Size: 718MB
  • IAR Embedded Workbench for PIC18 3.10

    IAR Embedded Workbench® for PIC18 Integrated development environment and optimizing C/C++ compiler for PIC18 IAR Embedded Workbench with its optimizing C and C++ compiler supports all Microchip PIC18 microcontrollers and provides debug interface to MPLAB v7.x. Key components * Integrated devel.....
    Language : english Authorization: Retail Freshtime:2009-09-03 Size: 40MB
  • ATK Magic Tool Suite 7.43

    The MAGIC Tool Suite includes MAGIC2D, a two- and one-half dimensional code (2D fields and 3D particle kinematics), MAGIC3D, a fully three-dimensional counterpart to MAGIC2D, and POSTER, a general-purpose post-processor.  The MAGIC codes are electromagnetic particle-in-cell codes, i.e., a fi.....
    Language : english Authorization: Retail Freshtime:2009-09-01 Size: 63MB
  • Pulsonix 6.0 build 3818

    ::::::English Description::::::Pulsonix continues to build on its unrivalled combination of sophistication and ease-of-use, with over 25 new and enhanced features to further boost your productivity in circuit design and PCB layout.Feature Summary for Pulsonix V4.6-Add to net on multiple items-Desig.....
    Language : english Authorization: Pre Release Freshtime:2009-08-31 Size: 97MB
  • Synopsys Liberty NCX 2009.06 sp1 Linux

    Synopsys, Inc. has unveiled its new Liberty NCX next-generation library characterization solution for 65-nm and below process technologies. Liberty NCX is architected around Composite Current Source (CCS) models, the technology proven to deliver comprehensive characterization, performance and acc.....
    Language : English Authorization: Pre Release Freshtime:2009-08-23 Size: 51MB
  • Synopsys Cadabra 2008.09 Linux

    Library developers are facing increasing challenges at the 65nm and 45nm nodes, including increasing design rule complexity, time-to-market pressures, library richness, and late design rule changes. Manual layout is becoming increasingly impractical and expensive. The Cadabra® product offers .....
    Language : english Authorization: Retail Freshtime:2009-08-23 Size: 55MB
  • IMST Empire XCcel 5.3

    Application examples the IMST engineers designed with the EMPIRE software. More examples are shown in the application part of the web page.::::::English Description::::::The XCcel features the new GUI, designed from ground-up to deliver truly intuitive and easy to use simulation tool. The discontinu.....
    Language : english Authorization: Retail Freshtime:2009-08-22 Size: 474MB
  • CATENA SIMetrix-Simplis 5.6

    SIMetrix/SIMPLIS is a circuit simulation suite optimized for the design and development of electronic power systems. SIMetrix/SIMPLIS comprises the SIMetrix environment with the revolutionary SIMPLIS simulator from SIMPLIS Technologies.New The SIMetrix/SIMPLIS simulation engines, are now integrat.....
    Language : english Authorization: Retail Freshtime:2009-08-21 Size: 39MB
  • Synopsys NanoTime 2009.06 Linux

    The Challenge Accurate transistor-level analysis of crosstalk-delay As designs go down to 90-nm and below, crosstalk-delay becomes more than 25% of total delay. Prior solutions including traditional static timing analysis with optional 3rd party crosstalk delay analysis do not provide the accuracy a.....
    Language : english Authorization: Retail Freshtime:2009-08-21 Size: 120MB
  • Synopsys VCS-MX 2009.06 Linux

    VCS MX uses the Synopsys Installer tool, which allows you to use a graphical user interface (GUI) or a text script. For information about downloading Synopsys Installer and VCS MX, see “Downloading the Software” in Installing Synopsys Tools To install VCS MX by EST or from the CD, follow the proce.....
    Language : english Authorization: Retail Freshtime:2009-08-21 Size: 762MB
  • Synopsys VCS 2009.06 Linux

    VCS® is the industry?s most comprehensive RTL verification solution in a single product, providing advanced bug-finding technologies, a built-in debug and visualization environment and support for all popular design and verification languages including Verilog, VHDL, SystemVerilog and SystemC.....
    Language : english Authorization: Retail Freshtime:2009-08-21 Size: 668MB